Many different types of photovoltaic devices are known in the art (e.g., see U.S. Patent Document Nos. 2004/0261841, 2006/0180200, U.S. Pat. Nos. 4,335,266, 4,611,091, 6,784,361, 6,288,325, 6,631,603, and 6,123,824, the disclosures of which are incorporated by reference herein in their entireties). Examples of known photovoltaic devices include copper-indium gallium diselenide (approximately Cu(In, Ga)(Se,S)2 and/or CuInX-1GaXSe2) solar cells, also known as CIGS solar cells. There are other example compositions of a semiconductor absorber layer of a solar cell that may also be referred to as “CIGS.” These include, for example, and without limitation, copper-indium-gallium sulfide. CIGS films are conductive semiconductor compounds that are often referred to as an absorber or light absorbing layer(s) or film. Generally speaking, CIGS type photovoltaic devices include, from the front or light incident side moving rearwardly, a front cover of material such as glass (front substrate), a front electrode comprising a transparent conductive layer(s) (e.g., a transparent conductive oxide such as zinc oxide), a light absorption semiconductor film (e.g., CIGS), a rear electrode or contact, and a rear substrate of a material such as, for example, soda-lime-silica based glass (or metal foil for flexible applications). In some instances, an adhesive may be provided between the front cover glass (front substrate) and the front electrode. It is also the case in some instances that the device is provided with window layer(s) (e.g., of or including CdS, ZnS, or the like). Photovoltaic power is generated when light incident on the front side (or front cover glass) of the device passes through the front electrode and is absorbed by the light absorption semiconductor film (e.g., CIGS), as is known in the art. Certain designs may also utilize compositional grading of the semiconductor absorber, for example, with an increased Ga/(Ga+In) ratio toward the rear electrode or contact. Photovoltaic devices having a compositionally graded CIGS absorber may, for example, be made using a two- or three-step deposition process.
For example, with reference to FIG. 1, there is generally provided a schematic cross-sectional diagram illustrating various elements of a conventional CIGS-type photovoltaic device 10. The cell 10 is structurally supported on a glass substrate (or back glass) 12. A back contact of a metal layer, such as, for example, molybdenum (Mo) 14 is typically deposited on the glass substrate 12. The first active region of the device 10 comprises a semiconductor film 16 which is typically a p-type copper indium/gallium diselenide (CIGS). A thin “window” layer of n-type compound semiconductor 18, typically comprising cadmium sulfide (CdS), may then be formed on CIGS film 16. A layer of conducting wide bandgap semiconductor material 20, typically formed of a substantially transparent conductive metal oxide, such as zinc oxide, is deposited on the CdS layer 18 and acts as a transparent front contact/electrode 25 for the device 10. The device 10 may be completed by including a series of front face contacts (not shown) in the form of, for example, a metal grid on top of the transparent front contact 25 to facilitate the extraction of generated electrons, and a front glass substrate 21. A large solar cell may also be divided into a number or smaller cells by means of scribes, such as, for example, laser or mechanical scribes or the like, traditionally referred to as P1, P2 and P3, which allow individual cells to be connected in series.
As noted above, a metal such as Mo may be used as the rear electrode (or back contact) 14 of a photovoltaic device, such as, for example, a CIGS solar cell 10, to extract positive charges generated in the CIGS semiconductor absorber 16 of the solar cell 10. In certain instances, the Mo rear electrode 14 may be sputter-deposited using, for example, direct-current magnetron sputtering, onto the back glass substrate 12 of the CIGS solar cell 10. As noted above, the core of a CIGS cell may be a polycrystalline p-type chalcopyrite semiconductor absorber, traditionally formed, for example, using co-evaporation, sputtering, or non-vacuum solution processes, followed by a solid-vapor reaction with selenium or sulfur (in the case of copper-indium-gallium sulfide CIGS) at a high-temperature, sometimes referred to as selenization or sufurization.
Electroplating the CIGS absorber has recently emerged as a technique for inexpensively manufacturing CIGS devices. Some advantages of electroplating include high material utilization (e.g., reduced material waste), improved deposition precision and electroplating is a well known and well understood technique. In a typical electroplated CIGS device, a copper (Cu) seed layer in the range of 40-80 nm thick is used, and is typically deposited on a thick Mo rear contact layer 14. The CIGS absorber 16 is subsequently formed on the copper containing seed layer by high-temperature selenization and/or sulfurization. A thin (e.g., ˜50-100 nm) n-type Cds window layer is formed on the CIGS absorber using chemical bath deposition, after which a TCO front contact/electrode 25 is formed. During device formation, an ordered defect chalcopyrite (ODC) is formed at the CIGS/CdS interface. This ODC is known to improve device performance.
Formation of the CIGS on the copper seed layer may be accomplished in any number of ways. Each of the CIGS deposition methods is followed by high-temperature post-deposition baking at temperatures between about 450° C.-600° C. A first example method includes electroplating an additional Cu layer followed by electroplating of In and Ga layers, and then subjecting the stack to a reaction with Se or S. A second example method includes electroplating of Cu—In, Cu—Ga, In—Ga or Cu—Se, Ga—Se and In—Se alloys and then reacting them on the Cu seed layer. A third example method includes simply electroplating the entire CIGS compound. However, the CIGS absorber 16 is poorly matched with the Mo rear contact 14, resulting in performance disadvantages.
Therefore, according to certain example embodiments of this invention, there is needed an interface (or “seed”) layer interposed between the rear contact 14, typically substantially comprising Mo, and the CIGS absorber 16 in CIGS-type photovoltaic devices. According to certain example embodiments disclosed and described herein, the interfacial/seed layer interposed between the Mo rear contact 14 and the CIGS absorber 16 may comprise or consist essentially of element(s) that make up the CIGS absorber, such as, for example, one, two or three of Cu, In and Ga. The interfacial seed layer may be made up of one or more layers/sublayers.
In certain example embodiments of this invention, there is provided a method of making a photovoltaic device, the method comprising: forming a conductive back electrode layer comprising Mo on a rear substrate; sputter-depositing an interfacial seed layer on said rear substrate and on said conductive back electrode layer, said seed layer comprising copper, indium and gallium; forming a semiconductor absorber on the rear substrate over the interfacial seed layer, wherein said forming the semiconductor absorber comprises sputter-depositing a layer comprising or consisting essentially of Cu and thereafter electroplating a film comprising In and Ga over at least the layer comprising or consisting essentially of Cu, said film comprising In and Ga including one or more layers.
Additionally, it may be advantageous to provide an interfacial seed layer that is/are compositionally graded in the vicinity of the Mo/CIGS interface to further improve the matching of the semiconductor CIGS absorber 16 to the Mo rear electrode 14. Compositional grading of the resulting interfacial seed layer may be accomplished in various ways that are discussed in greater detail below with respect to various example embodiments.
According to certain example embodiments disclosed herein several different example seed layers are disclosed. Any of these seed layers may be used alone or in combination with each other, and optionally be provided above or on top of (directly or indirectly) the Mo portion 14 of the back contact. For example, a seed layer or stack comprising or consisting essentially of a plurality of sublayers or film(s) may be sputter deposited in a graded manner using multiple sputtering cathodes with precise and well controlled compositions of Cu, In and Ga in an alternating manner. It has been found that it is thus easier to control the composition, thickness and/or molar ratio of the Cu, In and Ga components of the example seed stack according to certain example embodiments by using sputtering as opposed to relying on a diffusion profile. According to certain example embodiments, a concentration of Ga may be incrementally decreased in a direction going away from the rear contact to provide a compositionally graded seed layer. According to certain example embodiments, a concentration of In may be incrementally increased in a direction going away from the rear contact.
According to certain other example embodiments, a plurality of metallic and/or substantially metallic Cu—Ga—In layers may be deposited above (directly or indirectly) the Mo rear contact 14 and between the CIGS 16 and Mo 14 at the CIGS/Mo interface. The Ga concentration may be incrementally decreased and/or the In content incrementally increased in subsequently sputtered layers to bring their concentration level(s) in the outermost layer of the seed stack close and/or proximate to those used in the bulk of the CIGS absorber 16 and to improve matching of the Mo rear contact 14 and CIGS absorber 16. Additionally, it may be preferred that the concentrations of Cu, In and Ga follow a relative concentrational relationship wherein, for example, [Cu]>([In]+[Ga]), where [Cu] is a concentration of Cu, [In] is a concentration of In, and [Ga] is a concentration of Ga. In certain examples, a seed layer(s) adjacent the Mo rear contact 14 may have a Ga concentration higher than another seed layer(s) further away from the Mo rear contact 14. According to certain example embodiments, a concentration of Ga may be incrementally decreased in a direction going away from the rear contact 14. According to certain example embodiments, a concentration of In is incrementally increased in a direction going away from the rear contact 14.
According to certain example embodiments, a compositionally complete thin sputtered CIGS layer(s) may be used to form various layer(s) of the interfacial seed layer(s) for an electroplated absorber. According to such an example embodiment, a concentration of Ga in one, some or all of the compositionally complete CIGS layer(s) may be incrementally decreased in a direction going away from the rear contact 14. According to certain example embodiments, a concentration of In in one, some or all of the compositionally complete CIGS layer(s) may be incrementally increased in a direction going away from the rear contact 14.
According to certain example embodiments, the Mo electrode 14 may be slightly oxidized and/or provided with a thin MoOx layer at the CIGS/Mo interface to raise the Mo work function to better match it to the Ga-rich interface portion of the seed layer closest to the Mo rear contact.
In any example embodiment of this invention, a dielectric layer (e.g., of or including silicon nitride, silicon oxide, aluminum oxide, and/or silicon oxynitride) may be used between the Mo 14 and the back substrate 12, which may comprise soda-lime-silica based glass, to slow or reduce diffusion of elements from the glass to the precisely tailored seed layer(s) at the CIGS/Mo interface.
These and other embodiments and advantages are described herein with respect to certain example embodiments and with reference to the following drawings in which like reference numerals refer to like elements, and wherein: